The race to develop next-generation GPUs and different know-how for generative AI, machine studying, and different high-speed computing functions is now continuing at a breakneck tempo as numerous gamers within the electronics trade search to carve their area of interest on this booming space. However for Casey Morrison, Chief Product Officer and Co-Founding father of Silicon Valley-based Astera Labs, AI has been on the corporate’s radar because the firm began working in 2017 out of a Silicon Valley storage.
Morrison is that this yr’s winner of the DesignCon Engineer of the 12 months award, given to an trade know-how chief who has made important contributions in engineering and new product developments on the chip, board, or system degree, with a particular emphasis on sign integrity and energy integrity.
Morrison gained for his pioneering work in semiconductor-based, high-speed connectivity options, which have develop into significantly vital for AI and high-speed computing. He was chosen over 4 different finalists who themselves are heavyweights of their respective fields, together with: Scott McMorrow, Strategic Technologist for Samtec; Yuriy Shlepnev, President and Founding father of Simberian; Bert Simonovich, Sign Integrity and Backplane Marketing consultant for Lamsim Enterprises; and Ransom Stephens, Consulting Senior Scientist for BitifEye Digital Take a look at Options GmBH.
“This can be a nice honor to be acknowledged by the DesignCon group with whom I’ve been working for effectively over a decade,” stated Morrison in an unique interview with Design Information. “I contemplate every skilled relationship I’ve constructed with distributors, companions, and clients to be a particular accomplishment for me personally.”
Beginning in Serdes
Morrison has lengthy been within the trenches on high-speed sign interfaces. After graduating with an MSEE from the College of Florida, he began his profession with Texas Devices engaged on an engineering design workforce concerned in Serdes and sign integrity. It was at Texas Devices the place he met Jitendra Mohan and Sanjay Gajendra. The three determined the time was proper to strike out on their very own and in 2017 began Astera Labs, specializing in semiconductor-based connectivity options for cloud and AI infrastructure.
Morrison, who as Chief Product Officer spearheads Astera Lab’s know-how improvement, stated the strengths of Mohan, Astera’s CEO, and Gajendra, Astera’s COO, complement one another effectively and have helped the corporate develop from a garage-based startup to a Santa Clara-based firm that lately was honored with the International Semiconductor Alliance Most Revered Personal Firm award.
Morrison and his workforce’s imaginative and prescient of AI’s future upward trajectory was a key a part of the corporate’s development. “We had been satisfied of the promise of AI again in 2017. We believed that AI fashions would develop massive sufficient to be sensible solely at cloud-scale. We guess that an exponential development in AI processing energy could be constrained by a basic downside: connecting highly effective compute components at an enormous scale to sort out massive, distributed AI workloads. Whereas many different firms centered on constructing accelerators with unprecedented computing energy, we determined to deal with the issue of connecting all of them to ship the total efficiency of an AI cluster.
Astera Labs’ product line consists of its Aries PCIe/CXL Good DSP Retimers, Taurus Ethernet Good Cable Modules, and Leo CXL Good Reminiscence Controllers. When requested concerning the present buzz round CXL, Morrison stated, “CXL is interesting in lots of respects. It’s a broadly supported trade commonplace; it makes use of a ubiquitous bodily layer know-how known as the PCI Categorical PHY; and it permits one of many holy grails of cloud-scale computing: composable disaggregated infrastructure. CXL means that you can develop, pool, or share reminiscence with larger bandwidth and capability. The composability of a CXL-based material means that you can obtain scale in a cheap method.”
Morrison additionally famous that Astera Labs tries to resolve not solely connectivity points but in addition points reminiscent of community and reminiscence bandwidth. “Connecting AI processors collectively is just a part of the issue. These GPUs want a whole lot of sources, too. That’s why we got down to develop product households to deal with community and reminiscence connectivity bottlenecks,” he stated.
CXL and different connectivity requirements have developed through the years by teams participating in a whole lot of back-and-forth dialogue weighing the professionals and cons of proposed specs. “It is vitally a lot an artwork to weigh all these vital components,” he stated. “There are numerous conditions the place there are numerous opinions on how a spec ought to evolve.” Morrison conceded whereas he has misplaced a number of battles alongside the best way, he emphasised the necessity to keep a collaborative relationship with others to maneuver a aim ahead.
Morrison drew a parallel between a few of this skilled work with enjoying clarinet within the San Jose Symphony in his spare time. “You might be only one cog in a wheel, and everybody must be in sync. The identical is true with any workforce of engineers engaged on a mission.”
Whereas Morrison has what many can contemplate a profitable profession, he has extra objectives in thoughts. One among them is to present again to the academic and technical group. “Sometime I aspire to reconnect with the College of Florida, or with different native universities or excessive colleges to mentor college students or maybe host data periods on subjects associated to sign integrity, high-speed system design, or entrepreneurship. I might love to interact in that kind of instructional outreach and mentorship.”
Morrison has already made good on that promise. He’s donating the $1,000 Engineer of the 12 months Award grant he acquired to the ECE division on the College of Florida.